This application claims priority to Korean Patent Application No. 2003-0069695, filed on Oct. 7, 2003, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference.
1. Field of the Invention
The present invention relates generally to fuse boxes in integrated circuits, and more particularly, to a semiconductor fuse box with protective structures for effectively preventing damage to integrated circuit structures near a cut fuse structure.
2. Description of the Related Art
A semiconductor fuse box is commonly used in integrated circuits for providing connection adjustments. An example application of a semiconductor fuse box is for substituting redundancy cells for at least one inoperative cell of a memory device. To this end, fuses associated with the inoperative cells are cut by a laser beam within the fuse box to disable the inoperative cells. Thereafter, the redundancy cells are substituted for the inoperative cells. The laser beam is directed to a fuse comprised of polysilicon or of polysilicon and metal silicide, for cutting such a fuse.
FIGS. 1, 2, and 3 are cross-sectional views illustrating physical damage to the semiconductor fuse box when the laser beam is directed to the fuse box according to the prior art. Referring to FIG. 1, a semiconductor fuse box 60 includes fuse lines A, B, and C formed on a fuse buffer 20 that is formed on a semiconductor substrate 10. The fuse lines A, B, and C are spaced a predetermined distance apart from each other.
The fuse buffer 20 is comprised of a shallow trench isolation film or is a doped region of the semiconductor substrate 10. Each of the fuse lines A, B, and C is comprised of a respective fuse 25 and a respective fuse cap 30. A passivation layer 40 surrounds the fuse lines A, B, and C on the fuse buffer 20. A fuse window 50 is formed through the passivation layer 40 over the fuse lines A, B, and C.
During testing of the memory device including the fuse box 60, assume at least one cell of the memory device is determined to be inoperative. In that case, assume that the fuse line B associated with the inoperative cell is cut after stopping such testing for substituting the inoperative cell with a redundancy cell. Thus, a laser beam with an energy PA is directed to the fuse line B.
Referring to FIG. 1, upon irradiation of the laser beam, the energy of the laser beam becomes divided into a first energy PB1 directed to the fuse line B and second energies PB2 and PB3 directed to the passivation layer 40. Referring to FIG. 2, the first energy PB1 melts the fuse line B to expose the fuse buffer 20, and further transfers third energies PC1 and PC2 to the passivation layer 40.
Simultaneously in FIG. 1, the second energies PB2 and PB3 melt the passivation layer 40 to form a small groove 52 around the fuse line B. Then referring to FIG. 2, the second energies PB2 and PB3 are transformed into fourth energies PC3 and PC4 with decreased intensity from the energies PB2 and PB3. Referring to FIGS. 2 and 3, the third and fourth energies PC1 and PC2 and PC3 and PC4 melt the fuse buffer 20 and the passivation layer 40 adjacent to the fuse line B. Thus, larger grooves 54 and 56 are formed sequentially in FIGS. 2 and 3 exposing the adjacent fuse lines A and C.
Unfortunately, the exposed fuse lines A and C may be damaged by moisture in the air or during subsequent fabrication processes. Thus, it is desired to prevent the adjacent fuse lines A and C from being exposed after cutting the fuse line B.
U.S. Pat. No. 5,420,455 to Gilmour et al. discloses a fuse damage protection device with a barrier formed between the cut fuse line and an adjacent integrated circuit element. Such a barrier has a high melting point to prevent damage to the adjacent integrated circuit element when a laser beam is directed to the cut fuse line.
However, in U.S. Pat. No. 5,420,455 to Gilmour et al., the barrier extends from the top surface of the passivation layer surrounding the fuse line down to just half of the height of the fuse line. Thus, the adjacent integrated circuit element may still be damaged when the laser beam is directed to the fuse line. In addition, the barrier of U.S. Pat. No. 5,420,455 to Gilmour et al. simply has flat side surfaces that do not effectively absorb damaging forces to the passivation layer from the laser beam.
Thus, a mechanism is desired for more effectively protecting the adjacent integrated circuit element from the laser beam cutting the fuse line.